//例程基于STM32G070，移植需要修改宏定义，底层驱动部分

void SSD1363_312_comm_out(char data);
void SSD1363_312_data_out(char data);
void SSD1363_312_SPI_Write(char data);
void SSD1363_312_CleanDDR(void);


#define SSD1363_312_DC_SetOutput()         LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_5, LL_GPIO_MODE_OUTPUT);//DC   
#define SSD1363_312_DC_SetVal()            LL_GPIO_SetOutputPin(GPIOC, LL_GPIO_PIN_5);
#define SSD1363_312_DC_ClrVal()            LL_GPIO_ResetOutputPin(GPIOC, LL_GPIO_PIN_5);

#define SSD1363_312_RES_SetOutput()        LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_4, LL_GPIO_MODE_OUTPUT);//RES  
#define SSD1363_312_RES_SetVal()           LL_GPIO_SetOutputPin(GPIOC, LL_GPIO_PIN_4);
#define SSD1363_312_RES_ClrVal()           LL_GPIO_ResetOutputPin(GPIOC, LL_GPIO_PIN_4);

#define SSD1363_312_CS_SetOutput()         LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_2, LL_GPIO_MODE_OUTPUT);//CS
#define SSD1363_312_CS_SetVal()            LL_GPIO_SetOutputPin(GPIOC, LL_GPIO_PIN_2);
#define SSD1363_312_CS_ClrVal()            LL_GPIO_ResetOutputPin(GPIOC, LL_GPIO_PIN_2);

#define SSD1363_312_SCL_SetOutput()        LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_0, LL_GPIO_MODE_OUTPUT);//SDA
#define SSD1363_312_SCL_SetVal()           LL_GPIO_SetOutputPin(GPIOC, LL_GPIO_PIN_0);
#define SSD1363_312_SCL_ClrVal()           LL_GPIO_ResetOutputPin(GPIOC, LL_GPIO_PIN_0);

#define SSD1363_312_SDA_SetOutput()        LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_1, LL_GPIO_MODE_OUTPUT);//SDA
#define SSD1363_312_SDA_SetInput()         LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_1, LL_GPIO_MODE_INPUT);//SDA 
#define SSD1363_312_SDA_SetVal()           LL_GPIO_SetOutputPin(GPIOC, LL_GPIO_PIN_1);
#define SSD1363_312_SDA_ClrVal()           LL_GPIO_ResetOutputPin(GPIOC, LL_GPIO_PIN_1);
//BS0=0，BS1=1 ，8080
//BS0=0，BS1=0 ，SPI
#define SSD1363_312_BS1_SetOutput()         LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_8, LL_GPIO_MODE_OUTPUT);//DC   
#define SSD1363_312_BS1_SetVal()            LL_GPIO_SetOutputPin(GPIOC, LL_GPIO_PIN_8);
#define SSD1363_312_BS1_ClrVal()            LL_GPIO_ResetOutputPin(GPIOC, LL_GPIO_PIN_8);

#define SSD1363_312_BS0_SetOutput()         LL_GPIO_SetPinMode(GPIOC, LL_GPIO_PIN_9, LL_GPIO_MODE_OUTPUT);//DC   
#define SSD1363_312_BS0_SetVal()            LL_GPIO_SetOutputPin(GPIOC, LL_GPIO_PIN_9);
#define SSD1363_312_BS0_ClrVal()            LL_GPIO_ResetOutputPin(GPIOC, LL_GPIO_PIN_9);


/********************3.12寸 256x64 , SSD1363****************
列Column地址范围 ，8-71（64列），每列4个点，共256点，
16gray模式，每个字节2个点，刷新一个屏幕需要256*64/2=8192个字节。

刷新数据字节数要与刷新区域尺寸进行对应。
************************************************************/
void SSD1363_312_test(void)
{
  int i,j;
                   //50%
                     SSD1363_312_comm_out(0x15);//Set column address
                     SSD1363_312_data_out(8);//Column Start Address
                     SSD1363_312_data_out(71);//Column End Address
                     SSD1363_312_comm_out(0x75);//Set row address
                     SSD1363_312_data_out(0);//Row Start Address
                     SSD1363_312_data_out(63);//Row End Address
                     SSD1363_312_comm_out(0x5c); 
                     for(i=0;i<32;i++)
                     {      
                       for(j=0;j<128;j++)   {   SSD1363_312_data_out(0x0F);       }
                       for(j=0;j<128;j++)   {   SSD1363_312_data_out(0xF0);       }
                      // SSD1363_312_data_out(1<<i);  //SSD1363_312_data_out(0xF0);  //SSD1363_312_data_out(0x0F);  
                     }
                LL_mDelay(600);
                   //白色
                     SSD1363_312_comm_out(0x15);//Set column address
                     SSD1363_312_data_out(8);//Column Start Address
                     SSD1363_312_data_out(71);//Column End Address
                     SSD1363_312_comm_out(0x75);//Set row address
                     SSD1363_312_data_out(0);//Row Start Address
                     SSD1363_312_data_out(63);//Row End Address
                     SSD1363_312_comm_out(0x5c); 
                      for(i=0;i<8192;i++) {            SSD1363_312_data_out(0xFF);     }                     
                   LL_mDelay(600);
                  //黑
                     SSD1363_312_comm_out(0x15);//Set column address
                     SSD1363_312_data_out(9);//Column Start Address
                     SSD1363_312_data_out(70);//Column End Address
                     SSD1363_312_comm_out(0x75);//Set row address
                     SSD1363_312_data_out(1);//Row Start Address
                     SSD1363_312_data_out(62);//Row End Address
                     SSD1363_312_comm_out(0x5c); 
                      for(i=0;i<62*124;i++) {          SSD1363_312_data_out(0x00);     } 

                      LL_mDelay(600);
}

/********************初始化******************/
void SSD1363_312_initial(void)
{
    LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
    LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOC);
    
    SSD1363_312_CS_SetOutput();  SSD1363_312_CS_ClrVal();   
    SSD1363_312_RES_SetOutput(); SSD1363_312_RES_SetVal();   _Delay_us(40000);
    SSD1363_312_DC_SetOutput();
  
    SSD1363_312_SCL_SetOutput();      SSD1363_312_SCL_SetVal()          
    SSD1363_312_SDA_SetOutput();      SSD1363_312_SDA_SetVal();        

    SSD1363_312_BS1_SetOutput(); SSD1363_312_BS1_ClrVal();
    SSD1363_312_BS0_SetOutput(); SSD1363_312_BS0_ClrVal();
    
    
    SSD1363_312_RES_ClrVal();   _Delay_us(1000);
    SSD1363_312_RES_SetVal();   _Delay_us(100000);


    SSD1363_312_comm_out(0xae);//Set Display OFF
    SSD1363_312_comm_out(0xfd);//Set Command Lock
    SSD1363_312_data_out(0x12);
    SSD1363_312_comm_out(0xa0);//Set Re-map and Dual COM Line mode
    SSD1363_312_data_out(0x22);
    SSD1363_312_data_out(0x10);
    SSD1363_312_comm_out(0xa1);//Set Display Start Line
    SSD1363_312_data_out(0x00);
    SSD1363_312_comm_out(0xa2);//Set Display Offset
    SSD1363_312_data_out(0x00);
    SSD1363_312_comm_out(0xa6);//Normal Display
    SSD1363_312_comm_out(0xad);//Set IREF
    SSD1363_312_data_out(0x80);

    SSD1363_312_comm_out(0xb1);//Set Reset (Phase 1)/Pre-charge (Phase 2)period
    SSD1363_312_data_out(0xB2);
    SSD1363_312_comm_out(0xb3);//Set Front Clock Divider/Oscillator Frequency
    SSD1363_312_data_out(0x50);
    SSD1363_312_comm_out(0xb6);//Set Second Pre-charge Period
    SSD1363_312_data_out(0xC8);
    SSD1363_312_comm_out(0xb9);//Select Default Linear Gray Scale table
    
    SSD1363_312_comm_out(0xba);//Set Pre-charge voltage configuration
    SSD1363_312_data_out(0x02);
    SSD1363_312_comm_out(0xbb);//Set Pre-charge voltage
    SSD1363_312_data_out(0x07);
    SSD1363_312_comm_out(0xbe);//Set VCOMH
    SSD1363_312_data_out(0x07);
    SSD1363_312_comm_out(0xc1);//Set Contrast Current 
    SSD1363_312_data_out(0x27);//VCC=14V
    SSD1363_312_comm_out(0xca);//Set MUX Ratio
    SSD1363_312_data_out(0x7f);

    SSD1363_312_comm_out(0xaf);//Set Display ON
    SSD1363_312_CleanDDR (); 
    _Delay_us(100000);
}
/********************底层驱动*****************/
void SSD1363_312_comm_out(char data)
{
    SSD1363_312_DC_ClrVal();
    SSD1363_312_SPI_Write(data);
}
void SSD1363_312_data_out(char data)
{
    SSD1363_312_DC_SetVal();
    SSD1363_312_SPI_Write(data);
}
void SSD1363_312_SPI_Write(char data)
{
    uint8_t i;

    for(i=0; i<8; i++)
    {
        if(data & 0x80) {                SSD1363_312_SDA_SetVal();        }
        else            {                SSD1363_312_SDA_ClrVal();        }
        data <<= 1;		
         SSD1363_312_SCL_ClrVal();	
         SSD1363_312_SCL_SetVal();	
    }
}

void SSD1363_312_CleanDDR(void)
{
  char i,j;
    SSD1363_312_comm_out(0x15);//set column address
    SSD1363_312_data_out(0x00);//Column Start Address
    SSD1363_312_data_out(79);//Column End Address
    SSD1363_312_comm_out(0x75);//set row address
    SSD1363_312_data_out(0x00);//Row Start Address
    SSD1363_312_data_out(159);//Row End Address
    SSD1363_312_comm_out(0x5c); 
    for(i=0;i<160;i++)
    {
        for(j=0;j<160;j++)
        {
          SSD1363_312_data_out(0x00);//clean DDRAM
        }
    }
}